A common practice among designers of current-mode controlled DC to DC voltage converters is to design a modular system with parallel operated power cells. Then, in order to develop a system for specific applications, the designer need only gang together an appropriate number of these cells to achieve the desired power level.
FIG. 1 shows a converter cell having a transconductance type power amplifier used as a voltage regulator. The supply voltage V.sub.S is connected to input node 1 providing power for the transconductance amplifier 2. The error amplifier 3 compares the reference voltage V.sub.ref 4 with a fraction V.sub.frac 9 of output voltage V.sub.out 10 and controls the voltage on control terminal 8 of the transconductance amplifier 2 so that the output current 11 generates the required output voltage V.sub.out 10 on the resistor load 7. Typically, V.sub.ref is approximately equal to V.sub.frac. The fraction V.sub.frac 9 of the output voltage V.sub.out 10 is typically generated by a voltage divider network formed across a pair of resistors R.sub.1 and R.sub.2 coupled between the output of the transconductance amplifier 2 and ground.
FIG. 2 shows the prior art of parallel connection of multiple transconductance cells which is used to increase the system's output current capability. The system of FIG. 2 comprises three converter cells 30a, 30b and 30c; of course more or less such cells may be used as appropriate. Each of cells 30a, 30b and 30c is comprised of a transconductance type power-amplifier (DC converter) 32, an error amplifier 34 and a reference supply V.sub.ref 36. Each identifying number for the elements of each cell is shown with an a, b or c subscript as appropriate. Where a cell element is referred to without an alphabetic modifier it is understood that all similar elements in each cell is being described.
A supply voltage to be converted is applied to the DC input terminal 38 which is electrically coupled to the input 40 of each DC converter 32. The DC converter outputs 42 are electrically coupled together at the node 44. The node 44 is also coupled to voltage divider resistor 46, load 50 and the output node 52. Voltage divider resistor 46 is also coupled to the node 48. The node 48 is coupled to the voltage divider resistor 54. The voltage divider resistor 54 and the load 50 are each coupled to ground.
The node 48 is coupled to the error amplifier input 56a. The voltage at the error amplifier input 56a is compared to the reference V.sub.ref 36a to determine whether an error has occurred. Any error in the DC voltage on node 44 is amplified by the error amplifier 34a and applied to error amplifier output 58a. The voltage on the error amplifier output 58a is applied to each input 64 of each transconductance type power amplifier 32. The signal applied to the control input 64 drives the output currents I.sub.out 43 of the transconductance type power amplifiers 32 to produce the required output voltage on the load 50 so that the sense voltage 56a is always approximately equal with reference voltage 62a. The sum of the output currents 43 of the individual cells gives the output current 45 of the system. If the transconductance of the transconductance amplifier 32 is each cell 30 is nearly equal to each other then the cells will approximately equally share the output current 45 because the control voltage 64 is common for each cell. If the output current of each cell is limited to I.sub.max, by the allowed power dissipation, the total output current of a system of n cells is n * I.sub.max. In this case n=3 for the three cells. One disadvantage of this system is that it uses only one of the error amplifiers. The cell with the active error amplifier, 34a, controls the whole system and is normally called the master. If the master error amplifier 34a fails, the whole system will fail, i.e., the system is not fully redundant. The other disadvantage of this solution is that two control connection points (or pins in case of integrated solutions) per cell are needed to achieve the parallel operation (64, 58).
It is an object of the present invention to provide an error amplifier circuit for use in high reliability fully redundant masterless modular applications.
It is another object of the present invention to provide this feature with only one control access per module.
These and other features will be achieved and described with respect to a preferred embodiment below.